In this project 6T and 8T SRAM is designed in ASAP7 and parameters analysed using SPICE, Cscope. Also compared the layout vs schematic (DRC, LVS, PEX) synthesis • Tools / Technologies: ASPA7(7nm), Cadence, SPICE.
In this project design and development of SPI by create the single input Master and single input Slave. The Finite State Machines (FSM) are used for verification purposes. From the RTL synthesis results are covered. • Tools / Technologies: EDA tools, Model sim Altera, XILINX(VIVADO), SPI • Presented in Research Day 2020 SRM University, AP. • Submitted in IEEE
In the previous research work various architectures and designs are discussed, so in this current work we consider the two types of the core form of unified RO-PUF TRNG circuit, the calibration and parameters analysis are taken while comparing with previous RO-PUF-TRNG papers. • Tools / Technologies: Cadence (VM ware), CMOS, FPGA • Presented in Research Day 2022 SRM University, AP • Published in IEEE.
The project deals with image enhancement techniques. The main theme is the enhancement of image to find A) Threshold Operation B) Invert Operation C) Brightness Operation. • Tools / Technologies: MATLAB, XILINX(VIVADO), DSP. • Presented in Research Day 2020 SRM University, AP. • Published in IRPH.
In this project performance evaluation of 6tsram cell topology and analyzing the different parameters using 90nm node. • Tools / Technologies: Cadence (VM ware), CMOS • Presented in Research Day 2021 SRM University, AP • Published in IJERT.
In this project, an 8-bit ALU was designed using Verilog Language.functional verification of design testbench is used and verified all functional operations.